# Lead FPGA Development Engineer Leader (m,f,d) at GE Vernova

> Open job at GE Vernova. Workplace: Remote (Germany).

Source: Germany Dev Jobs, https://germanydevjobs.com/jobs/ge-vernova-lead-fpga-development-engineer-leader-m-f-d-t0dlqcw
Posted 9 November 2026. Last checked on the employer's career site: 10 November 2026.

## Facts

- Company: [GE Vernova](https://germanydevjobs.com/companies/ge-vernova)
- Location: Remote (Germany)
- Workplace: Remote (Germany)
- Employment type: Full-time
- German: Not required
- Relocation support: No
- Skills: Python
- Not mentioned in the job post: salary, visa sponsorship, where you can apply from

## Job description

### Job Description Summary

The Lead FPGA Firmware Engineer will be working to define requirements, enhance product features for an electronic design for world-class Control & Protection system in VSC and LCC systems, VBE, working together with engineers based in global locations.

The role is accountable for business-critical design, development to meet product requirements and timelines for future commercial HVDC projects.

### Job Description

**Roles and Responsibilities:**

- Analysing system requirements and defining functions to be implemented in Hardware.
- **Strong Knowledge and experience of Model Based Design (MAT LAB Simulink, HDL coder, Xilinx System Generator)**
- **FPGA Firmware development.**
- Analogue and digital Hardware design.
- Maintain legacy products including updates and improvements to extend product life span.
- Contribution to creating and maintaining manufacturing data packs.
- Writing functional specifications for design.
- Writing test specifications (Routine test, Type test, **Test Harness**).
- Participating in and contributing to design reviews.
- Ensuring designs are documented to Company standards.

**Required Qualifications:**

- Degree or Higher in Electrical / Electronic engineering or equivalent experience.
- Demonstrable knowledge and experience of Model Based Design.
- Minimum 10+ years' experience of FPGA design using VHDL or Verilog.
- Strong all-round knowledge and understanding of electronic components & principles.
- Exceptional hardware / FPGA debugging skills.
- Experience with Altera, Microsemi, Xilinx FPGA devices and design tools (Quartus II, Libero SoC).
- Dynamic and proactive with ability to work on own or as part of a multi-disciplinary engineering team to resolve technical issues.
- Experience of designing hardware for real time control applications.
- High-speed digital hardware design and PCB layout skills.

**Desired Qualifications:**

- Experience of designing hardware for real time control applications
- High-speed digital hardware design and PCB layout skills.
- Good verbal and written communication skills.
- Motivated great teammate, self-starter, results oriented.
- Agile development practices e.g., Scrum
- Scripting experience using Perl, Python
- Experience of version control, e.g., SVN, GIT
- Bug tracking tools, e.g., JIRA
- Power Electronics control system design.
- Knowledge of HVDC.

### Additional Information

**Relocation Assistance Provided:** No

#LI-Remote - This is a remote position

## How to apply

Apply on the job page, https://germanydevjobs.com/jobs/ge-vernova-lead-fpga-development-engineer-leader-m-f-d-t0dlqcw: its Apply button opens the employer's own application page.

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- [DevOps Engineer (m/f/d)](https://germanydevjobs.com/jobs/ge-vernova-devops-engineer-m-f-d-2th5ufn): GE Vernova, Berlin, Germany. Hybrid. Posted 9 November 2026.
- [Senior Embedded Software Architect (m/f/d)](https://germanydevjobs.com/jobs/ge-vernova-senior-embedded-software-architect-m-f-d-fheje5a): GE Vernova, Berlin, Germany. On-site. Posted 9 November 2026.
- [Lead Modeling & Simulation Engineer (m/f/d)](https://germanydevjobs.com/jobs/ge-vernova-lead-modeling-simulation-engineer-m-f-d-c6a9hnv): GE Vernova, Berlin, Germany. Hybrid. Posted 9 November 2026.
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- [IT Network & SCADA Design Engineer HVDC (m/w/d)](https://germanydevjobs.com/jobs/ge-vernova-it-network-scada-design-engineer-hvdc-m-w-d-4607xw4): GE Vernova, Berlin, Germany. On-site. Posted 29 October 2026.
